IEEE 1500-2005 嵌入式基于芯片的集成电路的可试性方法

标准号：IEEE 1500-2005
中文标准名称：嵌入式基于芯片的集成电路的可试性方法
英文标准名称：Standard Testability Method for Embedded Core-based Integrated Circuits IEEE Computer Society document
标准类型：L56
发布日期：2005/3/20 12:00:00
实施日期：1999/12/31 12:00:00
中国标准分类号：L56
国际标准分类号：31.200
适用范围：This standard defines a mechanism for the test of core designs within a system on chip (SoC). This mechanism constitutes a hardware architecture and leverages the core test language (CTL) to facilitate communication between core designers and core integrators.