IEC 60748-2-12-2001 半导体器件 集成电路 第2-12部分：数字集成电路 可编程逻辑器件（PLDs）空白详细规范

标准号：IEC 60748-2-12-2001
中文标准名称：半导体器件 集成电路 第2-12部分：数字集成电路 可编程逻辑器件（PLDs）空白详细规范
英文标准名称：Semiconductor devices - Integrated circuits - Part 2-12: Digital integrated circuits; Blank detail specification for programmable logic devices (PLDs)
标准类型：L55
发布日期：1999/12/31 12:00:00
实施日期：1999/12/31 12:00:00
中国标准分类号：L55
国际标准分类号：31.200
适用范围：Semiconductor devices -Integrated circuits -Part 2-12:Digital integrated circuits -Blank detail specification for programmablelogic devices (PLDs) Marking and ordering information......................................................................1.1 Marking....................................................................................................1.2 Ordering information.................................................................................Application related description...........................................................................Specification of the function...............................................................................3.1 Block diagram..........................................................................................3.2 Identification and function of terminals.....................................................3.3 Functional description..............................................................................3.4 Family-related characteristics...................................................................Limiting values (absolute maximum rating system)............................................Operating conditions (within the specified operating temperature range)...........Electrical characteristics...................................................................................6.1 Static characteristics................................................................................6.2 Dynamic characteristics............................................................................6.3 Timing diagram........................................................................................6.4 Capacitances...........................................................................................Programming.....................................................................................................7.1 Programming mode..................................................................................7.2 Erasing mode (if applicable).....................................................................7.3 Number of programming-erasing cycles (where appropriate)....................7.4 Data retention information........................................................................Additional information.......................................................................................Screening (if required)......................................................................................Quality assessment procedures.........................................................................10.1 Qualification approval procedures............................................................10.2 Capability approval procedures................................................................Structural similarity procedures........................................................................Test conditions and inspection requirements....................................................12.1 General...................................................................................................12.2 Sampling requirements and formation of inspection lots..........................12.3 Inspection tables.....................................................................................12.4 Delayed deliveries...................................................................................Additional measurement method.......................................................................13.1 Data retention test (destructive test)........................................................13.2 Write/erase endurance: number of programming cycles (destructive test)13.3 Programmability......................................................................................